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Minimizing and Exploiting Leakage in VLSI Design

Minimizing and Exploiting Leakage in VLSI Design - Paperback

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Product Details
Author:
Nikhil Jayakumar
Publisher:
Springer
Publication Date:
Nov 28, 2014
Number of pages:
214 pages
Binding:
Paperback or Softback
ISBN-10:
1489985298
ISBN-13:
9781489985293

Overview

Power consumption of VLSI (Very Large Scale Integrated) circuits has been growing at an alarmingly rapid rate. This increase in power consumption, coupled with the increasing demand for portable/hand-held electronics, has made power consumption a dominant concern in the design of VLSI circuits today. Traditionally, dynamic (switching) power has dominated the total power consumption of an IC. However, due to current scaling trends, leakage power has now become a major component of the total power consumption in VLSI circuits. Leakage power reduction is especially important in portable/hand-held electronics such as cell-phones and PDAs. This book presents two techniques aimed at reducing leakage power in digital VLSI ICs. The first technique reduces leakage through the selective use of high threshold voltage sleep transistors. The second technique reduces leakage by applying the optimal Reverse Body Bias (RBB) voltage. This book also shows readers how to turn the leakage problem into an opportunity, through the use of sub-threshold logic.


  • | Author: Nikhil Jayakumar
  • | Publisher: Springer
  • | Publication Date: Nov 28, 2014
  • | Number of Pages: 214 pages
  • | Binding: Paperback or Softback
  • | ISBN-10: 1489985298
  • | ISBN-13: 9781489985293

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